:: Talk About Yield

How do you test 200 ICs designs a year?

Developing an effective design and test strategy for an IC can be a daunting task. Should you depend on ATPG, BIST, or DFT? When product success is on the line, it's smart to use clever combinations of all three.

Agere Systems produces hundreds of distinct devices, with 200 or so designs having been completed within the past year and a half. In this interesting case history, Agere finds the best fit -- and explains why.

When design meets test

DFM and DFY are not as synonymous as one might think

DFM tools typically ensure manufacturability of a design by making sure the design adheres to rules defined by the fab. Unfortunately, rule-checking provides a binary "yes or no" answer that says very little about yield.

While this approach offers firm assurance that the IC can be manufactured and can function, it becomes problematic as the feature sizes keep shrinking. This technical paper by Ara Markosian of Ponte Solution and Mark Rencher of Pivotal Enterprises shows the value of yield models.

Rules vs. Models

How to tame the characterization dragon

Characterization data is an invaluable tool for determining if a design is ready for volume production. Data is collected across the range of the possible manufacturing conditions and tested across the range of the possible operating conditions. The resulting data set is enormous.

In this article from SoCentral, LogicVision's Jaffer Hussain explains the steps that product engineers should take to conduct a thorough analysis of characterization data. He also suggests a means to ensure fast yield ramps by automating the process.

Taming characterization data