Yield Learning

| IN THIS ISSUE |

Executive Briefing: Physically-aware DFT adds a new dimension to IC yield learning.

Strategically Speaking: Modeling process technology for better yields.

Tech Paper: Reducing Leakage-Induced Field Returns.

Design for Manufacturing: Yield challenges require new DFM approach.

Test Topics: How were you planning to verify all that DFT?

Understanding AC scan-based delay testing

LogicVision and Magma announce integration between ETCreate and Blast Create and Blast Fusion

A Complete Design Solution for Structured ASICS

15 Minutes of Fame

:: Technical Papers

Reducing Leakage-Induced Field Returns

Studies show alarming growth of sub-threshold and gate-oxide leakages with shrinking feature dimensions. At these smaller geometries, leakage has significant system and component/part level ramifications.

At the system level, designers must contend with power consumption, heat dissipation and battery life issues (mobile applications). And at the component level, leakage strains the power rails and is responsible for a fair portion of thermal issues. Leakage is a major contributor to field returns, which is a widely overlooked source of yield loss.

In this Tech Paper, which was first published by TechOnline, LogicVision's Stephen Pateras, Jaffer Hussain, and Thomas Martis explain how to bring leakage induced field returns under control again.

Reducing leakage-induced field returns